The present disclosure relates to a current addition type digital-to-analog conversion circuit.
In recent years, inexpensive complementary metal-oxide semiconductors (CMOS) are used to manufacture system-on-chips (SOC) including analog circuits and digital circuits. Of those, current addition type digital-to-analog conversion circuits capable of operating at high speed are widely used for videos and communications.
On the other hand, customers have a strong demand for SOCs of higher-performance, more multifunctionality, miniaturization, lower power consumption, and the like. In particular, the lower power consumption is a factor that deteriorates the performance of digital-to-analog conversion circuits (hereinafter, referred to as D/A conversion circuit).
Japanese Patent Application Laid-open No. 2010-263660 discloses a technique considered to be similar to the present disclosure. Japanese Patent Application Laid-open No. 2010-263660 discloses a technique of, in a current switch circuit used in a current addition type D/A conversion circuit, improving the reduction in dynamic range, which is a problem when a transistor having a low threshold voltage is used at a low power-supply voltage, to obtain a large output voltage range.